Writing own PSoC Components in Verilog

After finishing the introduction into State Machines I wanted to come up with a implementation on a real device (I don't own an FPGA so far).

At the electronica I visited the Cypress booth and they showed me how to create own user componentes. The process looked very simple and indeed it is, at least if you dont want to pass parameters, have an API or customized Configuration panels.

But even if this more advanced stuff is a bit more tricky, the fact that you are able to write own components in Verilog or schematic entry (there is even a state machine entry) for a 2€ chip with an IDE that is free is just stunning!
If you want to dig deeper and actually fine tune the component (if you want to), write own APIs, own Config tools and all the stuff, check the "Component Author Guide" which can be found in the Help of "PSoC Creator".

The tutorial on how to create PSoC Components in Verilog can be found here.

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About Thomas Barth

Thomas Barth, born 1986, is a german teaching fellow and Ph.D. student. He studied electrical engineering in Darmstadt, Frankfurt and Helsinki and worked 7 years in industry automation before he switched to embedded systems and microelectronics. To read more about him, click here.